Sign up

Youssofal/Qwen3.6-27B-MTPLX-Optimized-Speed-FP16

🤗 Hugging Face sourceapache-2.027.4B params55 GBsafetensors✓ HF checksums availableupdated today
No torrent yet →

Qwen3.6 27B MTPLX Optimized Speed FP16

This is the FP16 sibling artifact for Youssofal/Qwen3.6-27B-MTPLX-Optimized-Speed. It is intended for MTPLX's device-aware default routing on older Apple Silicon systems where FP16 may be preferable to BF16.

MTPLX policy:

  • M1/M2 Apple Silicon: mtplx start may auto-select this FP16 artifact.
  • M3/M4/M5 and unknown hardware: mtplx start keeps the BF16 Optimized-Speed default.
  • Explicit --model always overrides automatic routing.

The artifact preserves packed integer/quantized tensors and converts BF16 floating tensors to FP16. See MTPLX_FP16_CONVERSION_MANIFEST.json for tensor-level conversion details and SHA256 checksums.

This model card is deliberately not a universal speed claim. Hardware-specific benchmarks should be reported separately.